Author Topic: another small breakthrough on our NERD technology. (Read 938869 times)

picowatt · « **Reply #1725 on:** April 05, 2012, 11:34:03 PM »

To all,

In consideration of a replication, I have been studying the two "papers" to which our focus is to be directed.

In the two "papers", even though the schematics appear to transpose the quad and single MOSFET connections, we can assume that in either circuit, regardless of whether the "quad" is Q1 or Q2, when the function generator output is positive, at least one MOSFET will be turned on, or at least partially so.

Referring to the first of the two papers presented (Experimental Evidence of a Breach...), FIG 3 depicts the conditions for "Test 1". If I am reading this LeCroy scope shot correctly, it appears that during the period when the function generator output is positive, the gate drive is approx. +12.5 volts. During this same time perod, the voltage across Rshunt appears to indicate little if any current flow (i.e., little if any Vdrop across Rshunt).

How can this be? If we assume that irregardless of which schematic is referenced, at least one MOSFET is connected in such a way that it would turn on fully with this level of positive voltage applied to the gate, there should be current flow indicated by the voltage at Rshunt.

In FIG 5, which references "Test 2", it appears that the gate voltage during the same positive FG period is approx. +5 volts, and, just as one would expect, the voltage across Rshunt indicates that approx. 2 amps are flowing. Consulting the data sheet for the IRFPG50, the indicated two amps is (depending on device temp) in fair agreement with this level of gate drive.

Am I reading these levels correctly on the scope shots? If so, in the FIG 3 scope shot referencing "Test 1", it would appear that the MOSFET that should turn on at the indicated gate drive level is either disconnected from the circuit or has gone "open circuit" (a fairly atypical failure mode as DS shorts are more common)

If anyone has an alternate explanation or if I am reading the LeCroy shots incorrectly, please explain.

PW

TinselKoala · « **Reply #1726 on:** April 06, 2012, 01:04:53 AM »

Hmmm... for reference I have attached the relevant figures from the paper below.

It sure looks to me like picowatt is right. In Figure 5, in fact, there does appear to be _less_ positive gate drive voltage than in Figure 3. With a positive going gate drive pulse of 10-12 volts as indicated in Fig 3 there should have been a mosfet turning on, and we'd see this in both the CVR trace and in the common drain trace (missing on these screens).

This paper claims to use the FIRST crossover circuit, though... the one that would heavily load the single Q1 mosfet during a positive gate pulse. And as I believe I have shown, with a 60 or 72 volt battery pack and the 11.11 ohm load, this mosfet would likely fail rapidly because its absolute maximum drain current and power dissipation levels (not well heatsunk) would be exceeded.

So perhaps picowatt is right: we are looking at a trace from a system with a blown mosfet. Any other explanations?

(Isn't it interesting that the oscillations are happening during the LOW or off phase of the gate drive signal ?)

In the text of the paper we find:

Quote

A. Test 1 Setup
The schematic in Fig. 1 refers with the following settings: 6
batteries x 12 volts each were applied in series. The offset of
the function generator was set to its extreme negative limit
resulting in an entire restriction of current flow during the ON
phase of the duty cycle. The duty cycle is also set to the limit
of the function generatorâ€™s shortest ON time within each
switching period of 2.7 minutes. The waveforms produced by
this setup are shown in Fig. 3 and Fig. 4.

But the gate drive signal shown in Figure 3 clearly shows a positive-going signal. I think if the LeCroy's channel trace invert is selected a symbol appears in the channel setting box, but I can't really recall.

It also appears that these are not live waveforms, they are stored and displayed from memory (the M at top left, the memory menu on the right side of the screen). With filenames like "bloc1068" and "bloc1029" it's easy to see how one might select the wrong waveform from memory and not display the intended one. But it's more likely that they have a blown mosfet, open from the heat, rather than shorted from overvoltage.

TinselKoala · « **Reply #1727 on:** April 06, 2012, 02:03:06 AM »

There is something else funny about those traces. Note in Figure 5 the scope is computing the integral of the CVR trace.... and its mean, max and min are all positive. It's very weird to want to see this integral... but the fact that it IS computed and the values that are given mean that the net voltage drop across the CVR is POSITIVE, even accounting for the swings above and below zero during the oscillations. Presumably the scope is integrating across one full cycle. Please correct me if I'm wrong here, but I don't think it matters to the conclusion.
And of course the battery trace is always positive even during its wildest (illusory) swings.
Yet the scope's math trace, simply doing a point by point multiplication of these two traces, comes up with negative mean, max and min values. There is only one way this could happen, and it's not "reverse current flow". I think that would have shown up as a negative value on the integral of the CVR trace.

picowatt · « **Reply #1728 on:** April 06, 2012, 02:49:16 AM »

TK,

I had not considered that CH3 imght be inverted in one of the scope shots. I do not believe that to be the case, as both views show the oscillation that occurs when the comon gate amplifier is biased on by the negative voltage from the FG.

SO, that leaves two possibilities, an internal D or S bond wire or the die was fused open in one or more MOSFET's (depends on which circuit is correct, just Q1 if as in the first paper), or one or more MOSFETS was removed/disconnected from the circuit during the test (again, Q1 if the first paper schematic is followed).

Assuming Q1 is fully turned on and RDSon equivalent to something close to 2R, Rload = 11R1, and Vbatt=60vots, Q1 would dissipate ca. 40 watts via about 4.5 amps flowing through the circuit. Thermal stress (over temp) more often causes a short between the drain and source. A severe overcurrent can fuse the bond wires or blow the package apart, but the IRFPG50 has a max Id of 6.1 amps, usually indicating the bond wires/wafer can handle at least that much current (as long as max wattage/temp is not exceeded). With thermal stress, a D/S short is a more common failure mode.

In any of your 830's that you "blew" from overtemp, what was the failure mode? D/S open or shorted?

PW

Rosemary Ainslie · « **Reply #1729 on:** April 06, 2012, 02:52:08 AM »

Quote from: picowatt on April 05, 2012, 11:34:03 PM

To all,

In consideration of a replication, I have been studying the two "papers" to which our focus is to be directed.

In the two "papers", even though the schematics appear to transpose the quad and single MOSFET connections, we can assume that in either circuit, regardless of whether the "quad" is Q1 or Q2, when the function generator output is positive, at least one MOSFET will be turned on, or at least partially so.

Referring to the first of the two papers presented (Experimental Evidence of a Breach...), FIG 3 depicts the conditions for "Test 1". If I am reading this LeCroy scope shot correctly, it appears that during the period when the function generator output is positive, the gate drive is approx. +12.5 volts. During this same time perod, the voltage across Rshunt appears to indicate little if any current flow (i.e., little if any Vdrop across Rshunt).

How can this be? If we assume that irregardless of which schematic is referenced, at least one MOSFET is connected in such a way that it would turn on fully with this level of positive voltage applied to the gate, there should be current flow indicated by the voltage at Rshunt.

In FIG 5, which references "Test 2", it appears that the gate voltage during the same positive FG period is approx. +5 volts, and, just as one would expect, the voltage across Rshunt indicates that approx. 2 amps are flowing. Consulting the data sheet for the IRFPG50, the indicated two amps is (depending on device temp) in fair agreement with this level of gate drive.

Am I reading these levels correctly on the scope shots? If so, in the FIG 3 scope shot referencing "Test 1", it would appear that the MOSFET that should turn on at the indicated gate drive level is either disconnected from the circuit or has gone "open circuit" (a fairly atypical failure mode as DS shorts are more common)

If anyone has an alternate explanation or if I am reading the LeCroy shots incorrectly, please explain.

PW

Thank you very much. We've finally got an appropriate observation. INDEED that's what we've been pointing to in that first test of that first part of that two part paper.

The current flow from the supply is blocked through adjustments to the off set that there is no current flow at all during the 'on' period of the duty cycle. Then during the 'off' period when the battery is indeed prevented from discharging any energy we have evidence of an oscillation that can persist for the full duration that the negative signal is applied to the gate of Q1.

The intention of Paper 2 is to resolve those paths.

Test 2, 3 and 4 were performed to show the exploitable potential in that configuration proposed to be due to the explanation in the second part of that paper.

Regards,
Rosemary
added

picowatt · « **Reply #1730 on:** April 06, 2012, 02:59:19 AM »

TK,

I see in the first paper that 6 batteries are indicated so with Vbatt at 72 volts and Q1 fully on, it would disipate closer to 58 watts via ca. 5.4 amps flowing.

Even 40 watts would require a decent heat sink, however, the positive portion of the duty cycle in the scope shots looks to be between 5-10%, so likely an IRFPF50 could survive this level of thermal dissipation for some time, as it could cool off for remaining 90-95% of the total cycle time. Possibly the 5.4 amps was a bit close to the abs. max of 6.1 amps...

I am wondering if Q1 was inadvertantly diconnected during "Test 1".

PW

Rosemary Ainslie · « **Reply #1731 on:** April 06, 2012, 03:10:03 AM »

Quote from: picowatt on April 06, 2012, 02:59:19 AM

TK,

I see in the first paper that 6 batteries are indicated so with Vbatt at 72 volts and Q1 fully on, it would disipate closer to 58 watts via ca. 5.4 amps flowing.

Even 40 watts would require a decent heat sink, however, the positive portion of the duty cycle in the scope shots looks to be between 5-10%, so likely an IRFPF50 could survive this level of thermal dissipation for some time, as it could cool off for remaining 90-95% of the total cycle time. Possibly the 5.4 amps was a bit close to the abs. max of 6.1 amps...

I am wondering if Q1 was inadvertantly diconnected during "Test 1".

PW

If you are only referring to Test 1 then why should you assume that any current was passed via Q1? In which case why should the transistor get unduly hot?

Rosemary

picowatt · « **Reply #1732 on:** April 06, 2012, 03:11:33 AM »

Rosemary,

Are you stating that the schematic in the first paper is correct AND the scope shot "FIG 3" also correctly represents that schematic's operation?

If so, there was a problem with the Q1 or its connections during "Test 1". Either Q1 was not functioning, i.e., it was internally open, or there was a bad connection to Q1 on the breadboard. There can be no other explanation.

Surely you must see that if +12.5 volts is applied to the gate of Q1 it would/must turn on if the schematic is correct.

Again, Q1 had to have been defective or a connection to it was not indeed connected. If the schematic is correct, I see no other option.

Electronically, what is your explanation?

PW

fuzzytomcat · « **Reply #1733 on:** April 06, 2012, 03:24:35 AM »

Rosemary has "DUPED" us again experimentalist, members and guests,

All the papers that were sent out to accredited journals or magazines for possible peer review and publication by the NERD RAT team have two different device schematics ....

Experimental Evidence of a Breach of Unity on Switched Circuit Apparatus ( ROSSI-JOP-1-PDF.pdf )
ROSSI-JOP-1-PDF_Q2_x4_Q1_.PNG

Proposed variation to Faradayâ€™s Lines of Force to include a magnetic dipole in its structure ( ROSSI-JOP-2- PDF.pdf )
ROSSI-JOP-2-PDF_Q1_Q2_x4_.PNG

As you can see Q1 / Q2 x4 is flip flopped or reversed in ROSSI-JOP-1-PDF_Q2_x4_Q1_.PNG .... and .... ROSSI-JOP-2-PDF_Q1_Q2_x4_.PNG

Rosemary explain this if you possibly can ..... there are to many of your unchecked device diagrams floating around and you haven't tied even one to any kind of a complete forum posted test package just lumps of crap !!

You know the drill always bloviating on all the engineers and academics that has seen your proposed failed devices whats required for consideration of a "CLAIM" .... WTF is your problem !!!

When can we expect the required testing from you that Stefan requested we've been waiting days now !! Did you not read Stefan's postings

Cheers,
FTC

Rosemary Ainslie · « **Reply #1734 on:** April 06, 2012, 03:25:49 AM »

Quote from: picowatt on April 06, 2012, 03:11:33 AM

Rosemary,

Are you stating that the schematic in the first paper is correct AND the scope shot "FIG 3" also correctly represents that schematic's operation?

If so, there was a problem with the Q1 or its connections during "Test 1". Either Q1 was not functioning, i.e., it was internally open, or there was a bad connection to Q1 on the breadboard. There can be no other explanation.

Surely you must see that if +12.5 volts is applied to the gate of Q1 it would/must turn on if the schematic is correct.

Again, Q1 had to have been defective or a connection to it was not indeed connected. If the schematic is correct, I see no other option.

Electronically, what is your explanation?

PW

Picowatt

I was given to understand that the offset of the function generator comprises a potentiometer that can be applied to resist the current flow from the battery supply. It is applicable to all the function generators that we used and we tested this on 2 different types and on a total of 6 different function generators during the two years that this circuit has been researched.

What I KNOW is that this is able to determine the rate at which the energy from the battery supply source is applied. But whatever manages this, the fact is that we can entirely restrict the flow of current or vary this as required with that offset. I leave that to the experts to determine. What should be of interest is that there is INDEED no current flow during the 'on' period of the duty cycle. There is nothing 'impaired' in the transistor. If you look at test 2, 3 and 4 - they all behave as required during the 'on' period.

And of interest and why these papers were written - is the fact that there is any path at all to allow the oscillation. What's begged is an explanation for the positive half of each half of that oscillation. If this is coming from the battery supply then how does it flow through Q1 or Q2? This is precisely the point of discussion that we arrived at with Poynty - when TK then usurped this thread with his rather pretentious claim of a replication let alone a debunk.

Rosemary

added
And may I add - that this is also precisely why he needed to 'avoid' all reference to our papers. I'm only sorry that he managed to distract everyone for as long as he did with those absurd analyses related to the 'function' of the 'mosfet' as he terms it.

picowatt · « **Reply #1735 on:** April 06, 2012, 03:37:56 AM »

Rosemary,

The scope shot FIG3 for "Test1" indicates that during the portion of the cycle when the function generator is positive, a voltage of +12.5 volts is being applied to the gate of Q1. From the IRFPG50 data sheet, with Vds of 70 volts, and at a temp of 25C, Q1 should be equivalent to a 3 ohm resistor (a bit higher resistance if hotter).

With Rload = 11.1 ohms, total load resistance across the 72 volt battery would be ca 13.3 ohms (the sum of Rload plus Q1's RDSon plus Rshunt) which means that ca. 5.4 amps should be flowing. 5.4 amps across the 3 ohms of Q1 would mean that there would be 16.2 volts across Q1. 16.2 volts times 5.4 amps is just over 87 watts. That is a lot of heat.

However, in the FIG. 3, no current flow is indicated which indicates that Q1 is defective or not connected.

In FIG. 5 for "Test 2", all is as it should be. Q1 has +5.5 volts applied to the gate, in good agreement with the IRFPG50 data sheet, ca. 2 amps should flow and is indeed indicated in the FIG. 5 scope shot.

Increasing the positive voltage on the gate of Q1 beyond +5.5 volts should cause additional current to flow as Q1 is turned on further.

In "Test 1", little if any current flow is indicated by FIG 3 even though the gate voltage in Q1 is indicated as being more positive than the level indicated in "Test 2".

PW
.

picowatt · « **Reply #1736 on:** April 06, 2012, 03:45:38 AM »

Rosemary,

You're replying faster than I can type!

The fact that the other tests, in particular, Test 2, do perform as one would expect and Test 1 does not, indicates an error issue during that test.

You are preaching to the choir regarding how a function generator works, and I do agree that if the FG output was zero volts or a negative voltage, Q1 would not turn on, but the scope shot FIG 3 for Test 1 indicates a gate voltage of +12.5 volts is being applied to Q1 during the positive portion of the FG's output. This should turn Q1 on even moreso than is done in Test 2.

PW

MileHigh · « **Reply #1737 on:** April 06, 2012, 03:52:51 AM »

Rosie and All:

Quote

I was given to understand that the offset of the function generator comprises a potentiometer that can be applied to resist the current flow from the battery supply.

That's typical mysterious Rosie prose, dear Rosie. It would appear that you/she believes that somehow the battery current that flows straight through function generator also has to flow though the offset potentiometer. Such that if you play with the offset potentiometer you reduce the battery current. She has hinted at this before with typical Rose pseudo "elektro-prose." You guys can try to figure that one out.

It sounds like Rosie is back into trying to understand this "simple circuit" that she she said she completely understands.

The real message here is that if you put scope captures in a report you must understand every single aspect of the each waveform in each scope capture. That's something that the RATs clearly did not do.

Anyway, back to my little pet project. I confirmed that the circuit is miswired as per Poynt's original reverse-engineered diagram.

So, stay tuned, the "Pegboard of Doom" will be posted soon.

MileHigh

Rosemary Ainslie · « **Reply #1738 on:** April 06, 2012, 03:54:25 AM »

Quote from: picowatt on April 06, 2012, 03:37:56 AM

Rosemary,

The scope shot FIG3 for "Test1" indicates that during the portion of the cycle when the function generator is positive, a voltage of +12.5 volts is being applied to the gate of Q1. From the IRFPG50 data sheet, with Vds of 70 volts, and at a temp of 25C, Q1 should be equivalent to a 3 ohm resistor (a bit higher resistance if hotter).

With Rload = 11.1 ohms, total load resistance across the 72 volt battery would be ca 13.3 ohms (the sum of Rload plus Q1's RDSon plus Rshunt) which means that ca. 5.4 amps should be flowing. 5.4 amps across the 3 ohms of Q1 would mean that there would be 16.2 volts across Q1. 16.2 volts times 5.4 amps is just over 87 watts. That is a lot of heat.

However, in the FIG. 3, no current flow is indicated which indicates that Q1 is defective or not connected.

I assure you that Q1 is most certainly connected. The offset button is applied to restrict the flow of current. Picowatt. I can only assure you that this additional function in a function generator is also available on TK's function generator. They all have this function. It is able to determine the rate at which current is applied. I do not know what comes into play. I was given to understand that it is acted as a potentiometer and assumed that it could superimpose a degree of corresponding or opposing charge to restrict the flow from the battery supply. I would have thought that you guys would have known the explanation for this. Certainly it has been seen and applied by some highly proficient engineers. And before you it has never even been referenced. However. What I KNOW and how we apply this - is to RESTRICT the flow of current during the 'on' period of that duty cycle.

Quote from: picowatt on April 06, 2012, 03:37:56 AM

In FIG. 5 for "Test 2", all is as it should be. Q1 has +5.5 volts applied to the gate, in good agreement with the IRFPG50 data sheet, ca. 2 amps should flow and is indeed indicated in the FIG. 5 scope shot.

Agreed. Yet if you look at the math trace you'll see that the product of the battery and shunt voltages are negative. And this, in turn, corresponds to our own analyses from those data dumps where we compute a negative wattage.

Quote from: picowatt on April 06, 2012, 03:37:56 AM

Increasing the positive voltage on the gate of Q1 beyond +5.5 volts should cause additional current to flow as Q1 is turned on further.

In "Test 1", little if any current flow is indicated by FIG 3 even though the gate voltage in Q1 is indicated as being more positive than the level indicated in "Test 2".

I think you should take a look at the results of our 'water to boil' test - which is test 3. We adjusted the offset that during the on period that it was barely above zero. Which means that there is no real correspondence between the measured input and the actual heat dissipated.

Regards,
Rosemary

ADDED

And MileHigh - I have NEVER presumed to comment on the functions generator. Only on our circuit.

fuzzytomcat · « **Reply #1739 on:** April 06, 2012, 03:54:31 AM »

Hey guys,

Your talking about Figure3 and Figure5 here in the paper called Experimental Evidence of a Breach of Unity on Switched Circuit Apparatus ( ROSSI-JOP-1-PDF.pdf )

Fig #3 dated 03/02/11 50s 73.8v (6 battery)
Fig #5 dated 02/09/11 500us 49.5v (4 battery)

Please see Rosemary's posting "SHOWING" a image of the device under test "A ONE MOSFET VERSION" on March 18, 2011 days after the scope shots in reference Fig #3 and Fig #5

http://www.overunity.com/10407/rosemary-ainslie-circuit-demonstration-on-saturday-march-12th-2011/msg278271/#msg278271 Reply #124 on: March 18, 2011, 10:56:29 AM

How can a five mosfet device version be referenced here

ANYONE ??

FTC

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Author Topic: another small breakthrough on our NERD technology. (Read 938869 times)

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